The present invention relates to a current-controlled saw-tooth wave oscillator stage of the type with unswitched thresholds, in particular for high-definition television screens and monitors.
As is known, an oscillator stage capable of generating an appropriate saw-tooth wave is currently used to drive the horizontal and vertical deflection of monitors and television circuits. In particular, oscillators stages with markedly high performance in terms of operating frequency, temperature stability and output signal precision are required to drive high-definition television circuits and monitors.
For example, the integrated circuit illustrated in FIG. 1 is known for generating said driving signals. Said circuit constitutes a current-controlled oscillator and is capable of supplying a saw-tooth voltage V.sub.OUT at the output indicated by 5; the oscillation frequency of said voltage depends on the value of a resistive element R.sub.EXT and of a capacitive element C.sub.EXT which are normally external to the integrated circuit and are respectively connected to the terminals 1 and 2 thereof, as well as on the difference between two threshold values V.sub.1 and V.sub.2 generated internally to the circuit. In detail, the output voltage V.sub.OUT is obtained by charging and discharging the capacitor C.sub.EXT between the two thresholds V.sub.1 and V.sub.2. For this purpose, the oscillator stage comprises a first section 10 including a resistive divider for generating the threshold voltages and a buffer constituted by a fedback amplifier with unitary gain capable of supplying a reference voltage V.sub.REF at the terminal 1 to which the resistor R.sub.EXT is connected. This resistor connected between said terminal and the ground thus allows to precisely set a reference current I which is then appropriately mirrored so as to obtain stable current sources with values I/2 and 2I included in the driving section 12 of the actual saw-tooth wave generator, which is indicated as a whole by the reference numeral 11. Said saw-tooth wave generator furthermore comprises a threshold detector stage 13 connected at the input to the output V.sub.OUT of the oscillator stage. The detector circuit 13, which is also connected to the threshold voltages V.sub.1 and V.sub.2, defines a pair of outputs 14 and 15 on which appropriate pulses are available respectively when the upper threshold voltage V.sub.1 or the lower threshold voltage V.sub.2 are reached. Said outputs 14 and 15 are connected to a pair of switches indicated as a whole by 16 and respectively constituted by transistors T.sub.11 and T.sub.12 intended to transfer said threshold-reaching pulses to a flip-flop stage 17 at the inputs S and R thereof. The outputs of said flip-flop memory circuit 17 are sent to the bases of a differential circuit constituted by two transistors T.sub.1 and T.sub.2 belonging to the driving stage 12, so as to alternately switch on the transistor T.sub.2 and to switch off the transistor T.sub.1 (thus allowing the capacitor to charge at the constant current I/2) or to switch off transistor T.sub.2 and to switch on the transistor T.sub.1 (thus allowing the capacitor to discharge at the current 1.5I as an effect of the generators I/2 and 2I).
The capacitor is consequently discharged with a current three times higher than the charge current, thus creating a saw-tooth wave with a rise time t.sub.c equal to three times the fall time t.sub.d. The period T of the resulting waveform can be easily calculated by means of the equation EQU I.DELTA.t=C.DELTA.V
in which I is the charge or discharge current of the capacitor C in the time .DELTA.t in the voltage range .DELTA.V. In this case one thus obtains ##EQU1## wherein i.sub.c =I/2 and i.sub.d =1.5I.
In order to achieve this behavior the threshold detector circuit 13 comprises two pairs of differential transistors T.sub.7 -T.sub.10 ; which, as previously mentioned, when the upper or lower threshold is reached, send a reset or set pulse respectively at the output 14 or at the output 15, respectively to the base R of T.sub.6 or to the base S of T.sub.3 so as to alternately cause the transistors T.sub.1 and T.sub.2 to conduct, as previously explained.
It should be furthermore noted that, since the output signal V.sub.OUT must be available to the stages connected downstream for the subsequent processings, there is a buffer stage B which decouples it from the signal present on the terminal 2, thus avoiding "loading" effects which can alter the preset values of the charge and discharge currents (signal deformation).
The above described stage operates advantageously as to its flexibility, since the set current can be varied within a wide range through R.sub.EXT (which does not depend on the temperature), and because switch thresholds not depending on variable parameters but on integrated resistive dividers are available and the dynamics of the output signal (defined as the ratio between the charge time and the discharge time) can be varied within a wide range by varying the currents i.sub.c and i.sub.d.
However, the described circuit is not suitable for driving high-definition television circuits and monitors. Said circuit is in fact incapable of providing the response rapidity and the precision required for this type of application due to the presence of PNP transistors (such as T.sub.11 and T.sub.12) and of saturating elements (i.e. the transistors T.sub.3 -T.sub.6 of the flip-flop stage 17) on the signal path. The presence of these transistors limits the operating frequency of the stage, slowing the response time of the entire system, with the double effect of preventing the circuit from oscillating at high frequencies and of introducing an error on the peak values of the output signal with respect to the values of the preset thresholds. Said error is furthermore not fixed but depends on the temperature, which as is known influences the response times of transistors, causing the drift of the operating frequency with respect to its nominal value.